Abstract
A discussion is presented of thermal figures-of-merit (FOMs) for chip package thermal resistance, for use in evaluating competing thermal designs, and analysis techniques, for use in determining operating temperature profiles. The junction-to-case thermal resistance, ΘJC, as well as the junction-to-fluid thermal resistance, have been used in both of these roles for first-level packaging. The use of a modified ΘJC is proposed. Experimental data indicate that the relations developed are capable not only of accurately describing the chip temperature for a variety of thermal management strategies, but also of highlighting the impact of specific thermal design features.
Original language | English |
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Pages | 1-4 |
Number of pages | 4 |
State | Published - 1 Dec 1989 |
Externally published | Yes |
Event | Fifth Annual IEEE Semiconductor Thermal and Temperature Measurement Symposium (SEMI-THERM) Proceedings 1989 - San Diego, CA, USA Duration: 7 Feb 1989 → 9 Feb 1989 |
Conference
Conference | Fifth Annual IEEE Semiconductor Thermal and Temperature Measurement Symposium (SEMI-THERM) Proceedings 1989 |
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City | San Diego, CA, USA |
Period | 7/02/89 → 9/02/89 |
ASJC Scopus subject areas
- General Engineering