A 0.65-V, 500-MHz Integrated Dynamic and Static RAM for Error Tolerant Applications

Keyphrases

• Static RAM 100%
• Integrated Dynamics 100%
• Dynamic Memory 100%
• Error-tolerant Applications 100%
• Static Random Access Memory 66%
• Dynamic Random Access Memory 66%
• Low Power 33%
• Memory Array 33%
• Power Consumption 33%
• Area Reduction 33%
• 65nm CMOS 33%
• Dynamic Cells 33%
• Single Array 33%
• Diminishing Returns 33%
• Memory Errors 33%
• Error-prone 33%
• Static Memory Cell 33%
• Video Decoder 33%
• Operating Mode 33%
• Computation Accuracy 33%
• Data Integrity 33%
• Approximate Computing 33%
• Power Reduction 33%
• Voltage Scaling 33%
• Power Performance Area 33%

Computer Science

• Dynamic Random Access Memory 100%
• Static Random Access Memory 100%
• Power Consumption 50%
• Approximate Computing 50%
• Memory Array 50%
• Data Integrity 50%
• Paradigm Shift 50%
• Static Memory 50%
• Operating Mode 50%