A 4-Transistor nMOS-Only Logic-Compatible Gain-Cell Embedded DRAM with over 1.6-ms Retention Time at 700 mV in 28-nm FD-SOI

Robert Giterman, Alexander Fish, Andreas Burg, Adam Teman

Research output: Contribution to journalArticlepeer-review

20 Scopus citations

Abstract

Gain-cell embedded DRAM (GC-eDRAM) is a possible alternative to traditional static random access memories (SRAM). While GC-eDRAM provides high-density, low-leakage, low-voltage, and inherent2-ported operation, its limited retention time requires periodic, power-hungry refresh cycles. This drawback is further aggravated at scaled technologies, where increased subthreshold leakage currents and decreased in-cell storage capacitances result in faster data integrity deterioration. Therefore, integration of GC-eDRAM within modern systems is often considered to be limited to mature process technologies, where these phenomena are less detrimental. In this paper, we present for the first time a fully functional GC-eDRAM array, implemented and fabricated in a 28-nm process node. The 8-kb array is based on a novel, 2-ported, 4-transistor NMOS-only bitcell with internal feedback to provide efficient operation in the target 28-nm FD-SOI technology. The fabricated memory macro achieves more than 1.6-ms data retention time at 27 °C, which is $30\times $ longer than conventional gain-cell topologies when applied to this technology. The described 4-transistor dual-port nMOS array utilizes over 70% of the total memory macro area, while retaining almost 30% lower cell area than a single-ported 6T SRAM in the same technology.

Original languageEnglish
Pages (from-to)1245-1256
Number of pages12
JournalIEEE Transactions on Circuits and Systems I: Regular Papers
Volume65
Issue number4
DOIs
StatePublished - 1 Apr 2018
Externally publishedYes

Keywords

  • FD-SOI
  • GC-eDRAM
  • Gain cell
  • SRAM
  • logic-compatible eDRAM
  • low power

Fingerprint

Dive into the research topics of 'A 4-Transistor nMOS-Only Logic-Compatible Gain-Cell Embedded DRAM with over 1.6-ms Retention Time at 700 mV in 28-nm FD-SOI'. Together they form a unique fingerprint.

Cite this