Skip to main navigation Skip to search Skip to main content

A 50 Gb/s WDM Silicon Photonic Ternary Content Addressable Memory cell

  • T. Moschos
  • , C. Pappas
  • , S. Kovaios
  • , I. Roumpos
  • , A. Prapas
  • , A. Tsakyridis
  • , M. Moralis-Pegios
  • , C. Vagionas
  • , Y. London
  • , T. Van Vaerenbergh
  • , B. Tossoun
  • , N. Pleros

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

We experimentally demonstrate a silicon integrated WDM ternary content addressable memory cell, capable of performing matchline operations at record-high speeds of 50 Gb/s, with an energy efficiency of just 38 fJ/bit.

Original languageEnglish
Title of host publication2025 Optical Fiber Communications Conference and Exhibition, OFC 2025 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers
ISBN (Electronic)9781557527370
DOIs
StatePublished - 1 Jan 2025
Externally publishedYes
Event2025 Optical Fiber Communications Conference and Exhibition, OFC 2025 - San Francisco, United States
Duration: 30 Mar 20253 Apr 2025

Publication series

Name2025 Optical Fiber Communications Conference and Exhibition, OFC 2025 - Proceedings

Conference

Conference2025 Optical Fiber Communications Conference and Exhibition, OFC 2025
Country/TerritoryUnited States
CitySan Francisco
Period30/03/253/04/25

ASJC Scopus subject areas

  • Artificial Intelligence
  • Computer Networks and Communications
  • Signal Processing
  • Electrical and Electronic Engineering
  • Instrumentation
  • Atomic and Molecular Physics, and Optics

Fingerprint

Dive into the research topics of 'A 50 Gb/s WDM Silicon Photonic Ternary Content Addressable Memory cell'. Together they form a unique fingerprint.

Cite this