A Novel Capacitor Sizing Method for Active DC Link Capacitance Reduction Circuit

Martin Mellincovsky, Mor Mordechai Peretz, Vladimir Yuhimenko, Alon Kuperman, Moshe Sitbon

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

The paper focuses on a novel capacitor sizing method for direct voltage regulated active capacitance reduction circuit. The aim of such a system is replacing the bulk DC bus capacitor without escalating the ripple. But the reduced capacitance implies a reduction on the storage energy, causing a large voltage drop during transients. The primary goal of the proposed method is to find the appropriate capacitor size to keep the voltage of the reduction circuit above a preset minimum voltage, even during transients. Mathematical analyses of the minimum capacitor voltage as well as the required capacitor size expression are presented. The revealed findings are fully supported by simulations and experimental results.

Original languageEnglish
Title of host publication2018 IEEE 19th Workshop on Control and Modeling for Power Electronics, COMPEL 2018
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Print)9781538655412
DOIs
StatePublished - 10 Sep 2018
Event19th IEEE Workshop on Control and Modeling for Power Electronics, COMPEL 2018 - Padova, Italy
Duration: 25 Jun 201828 Jun 2018

Publication series

Name2018 IEEE 19th Workshop on Control and Modeling for Power Electronics, COMPEL 2018

Conference

Conference19th IEEE Workshop on Control and Modeling for Power Electronics, COMPEL 2018
Country/TerritoryItaly
CityPadova
Period25/06/1828/06/18

Keywords

  • component
  • formatting
  • insert (keywords)
  • style
  • styling

ASJC Scopus subject areas

  • Modeling and Simulation
  • Energy Engineering and Power Technology
  • Electrical and Electronic Engineering
  • Control and Optimization

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