Abstract
In this paper, a proof of concept for a snapshot CMOS image sensor with extended dynamic range is presented. A prototype of 32 × 32 pixels has been fabricated using the 1-poly 4-metal CMOS 0.35 μm process available through MOSIS and was successfully tested. The measurements from the test chip showed that the fabricated imager allows wide dynamic range (WDR) operation in a snapshot readout mode. This DR extension has become possible due to a unique in-pixel architecture allowing automatic adaptation of each pixel in the array to its illumination level. To reduce the pixel power dissipation various low-power design techniques have been utilized in the pixel design. A single pixel occupies 18 * 18(μm)2 and dissipates 23 nW with 8 bit DR expansion at room light level, and 29 nW at high illumination level, equivalent to clear sky at video rate. The power dissipation of the whole sensor (including the supporting circuitry) is 450 μW at video rate. Sensor design is described, design considerations are shown and measurements from the test chip are presented.
Original language | English |
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Article number | 4749395 |
Pages (from-to) | 103-111 |
Number of pages | 9 |
Journal | IEEE Sensors Journal |
Volume | 9 |
Issue number | 2 |
DOIs | |
State | Published - 1 Feb 2009 |
Externally published | Yes |
Keywords
- CMOS imagers
- High dynamic range
- Image sensor
- Integration time
- Low-power
- Very large scale integration (VLSI)
ASJC Scopus subject areas
- Instrumentation
- Electrical and Electronic Engineering