Abstract
In the current environment of flash semiconductor market, competitive cycle times are the key to success. Cycle Time (CT) reduction can be achieved by process time elimination and/or equipment performance improvement, but also by optimizing on the WIP management policy. In this paper, we discuss how significant CT reductions are attained via the effective change of parameter values of the governing WIP management policy of a semiconductor factory. A full factorial Design of Experiments (DOE) was performed, and several parameters were examined. The impact on the coefficient of variability of departure rate (CDR) and CT was evaluated. Results have clearly shown that by changing the values of these parameters, significant cycle time reductions can be achieved.
| Original language | English |
|---|---|
| Title of host publication | 12th IFAC Symposium on Information Control Problems in Manufacturing, INCOM 2006, and Associated Industrial Meetings |
| Subtitle of host publication | EMM'2006, BPM'2006, JT'2006 |
| Publisher | IFAC Secretariat |
| Edition | PART 1 |
| ISBN (Print) | 9783902661043 |
| DOIs | |
| State | Published - 1 Jan 2006 |
| Externally published | Yes |
Publication series
| Name | IFAC Proceedings Volumes (IFAC-PapersOnline) |
|---|---|
| Number | PART 1 |
| Volume | 12 |
| ISSN (Print) | 1474-6670 |
UN SDGs
This output contributes to the following UN Sustainable Development Goals (SDGs)
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SDG 9 Industry, Innovation, and Infrastructure
Keywords
- Cycle time
- DOE
- Simulation
- Variability
- WIP management
ASJC Scopus subject areas
- Control and Systems Engineering
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