Achieving reduced production cycle times via effective control of key factors of the P-K equation

Adar Kalir, Sylvain Bouhnik

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

4 Scopus citations

Abstract

In the current environment of flash semiconductor market, competitive cycle times are the key to success. Cycle Time (CT) reduction can be achieved by process time elimination and equipment performance improvement, but also by optimized WIP management policy. In this paper, we discuss how significant CT reductions are attained via the effective change of parameter values of the governing WIP management policy of a semiconductor factory. A full factorial Design of Experiments (DOE) was performed, and several parameters were examined. The impact on the coefficient of variability of departure rate (CDR) and CT was evaluated. Results have clearly shown that by changing the values of these parameters, significant cycle time reductions of up to 13% can be achieved.

Original languageEnglish
Title of host publication17th Annual SEMI/IEEE Advanced Semiconductor Manufacturing Conference, ASMC 2006
Pages139-143
Number of pages5
DOIs
StatePublished - 1 Dec 2006
Externally publishedYes
Event17th Annual SEMI/IEEE Advanced Semiconductor Manufacturing Conference, ASMC 2006 - Boston, MA, United States
Duration: 22 May 200624 May 2006

Publication series

NameASMC (Advanced Semiconductor Manufacturing Conference) Proceedings
Volume2006
ISSN (Print)1078-8743

Conference

Conference17th Annual SEMI/IEEE Advanced Semiconductor Manufacturing Conference, ASMC 2006
Country/TerritoryUnited States
CityBoston, MA
Period22/05/0624/05/06

Keywords

  • Cycle time
  • DOE
  • Simulation
  • Variability
  • WIP management

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Engineering (all)
  • Industrial and Manufacturing Engineering
  • Electrical and Electronic Engineering

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