An FPGA controller for the Image Transceiver Device

N. Thirer; Y. David; I. Baal Zedaka; U. Efron

An FPGA controller for the Image Transceiver Device

N. Thirer, Y. David, I. Baal Zedaka, U. Efron

Unit of Photonics and Electro-Optics Engineering

Research output: Contribution to conference › Paper › peer-review

1 Scopus citations

Abstract

A CMOS Liquid Crystal based Image Transceiver Device (ITD) is under development at both the Holon Institute of Technology and Ben Gurion University [1], This device, as its name suggests, both receives and displays images, by using a dualfunction array of Imager and Display elements. An FPGA controller chip is under development for this chip. The uniqueness of this controller is its capability to control both the Imaging and the Display functions of the ITD chip. The FPGA controller, based on the Xilinx Virtex II Architecture, will allow the ITD Array to perform real time vision modes of Image Capture, Image display, as well as Image superposition and its display. In addition, the chip is designed to control the ADC and D AC circuits of the ITD chip so as to allow the data transfer between the ITD chip and an external computer for subsequent processing. In this work the FPGA Controller as well as the ITD system and its associated control units, are described.

Original language	English
Pages	169-172
Number of pages	4
State	Published - 1 Dec 2004
Event	2004 23rd IEEE Convention of Electrical and Electronics Engineers in Israel, Proceedings - Tel-Aviv, Israel Duration: 6 Sep 2004 → 7 Sep 2004

Conference

Conference	2004 23rd IEEE Convention of Electrical and Electronics Engineers in Israel, Proceedings
Country/Territory	Israel
City	Tel-Aviv
Period	6/09/04 → 7/09/04

ASJC Scopus subject areas

Electrical and Electronic Engineering
Electronic, Optical and Magnetic Materials

Cite this

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AU - Zedaka, I. Baal

AU - Efron, U.

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AB - A CMOS Liquid Crystal based Image Transceiver Device (ITD) is under development at both the Holon Institute of Technology and Ben Gurion University [1], This device, as its name suggests, both receives and displays images, by using a dualfunction array of Imager and Display elements. An FPGA controller chip is under development for this chip. The uniqueness of this controller is its capability to control both the Imaging and the Display functions of the ITD chip. The FPGA controller, based on the Xilinx Virtex II Architecture, will allow the ITD Array to perform real time vision modes of Image Capture, Image display, as well as Image superposition and its display. In addition, the chip is designed to control the ADC and D AC circuits of the ITD chip so as to allow the data transfer between the ITD chip and an external computer for subsequent processing. In this work the FPGA Controller as well as the ITD system and its associated control units, are described.

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An FPGA controller for the Image Transceiver Device

Abstract

Conference

ASJC Scopus subject areas

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