Analog readout circuit for zero leakage Planar-Hall-Effect-Magnetic-Random- Access-Memory

Anatoli Mordakhay, Alexander Fish

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

3 Scopus citations

Abstract

An analog readout circuit for use in conjunction with the Planar-Hall-Effect Magnetic-Random-Access-Memory is presented. The non-volatile nature of this type of memory allows zero leakage during memory retention, allowing significant power saving. The circuit employs a novel technique for readout operation of memory bit-cells. The circuit uses chopping and switched-capacitor techniques for amplification of the low input signal as well as elimination of DC-offset and low-frequency noise. The binary nature of the data allows an area efficient implementation at the cost of linearity, which is less significant for memory readout applications. The proposed circuit was implemented in the TowerJazz 180nm CMOS process at a supply voltage of 1.8V, and can reliably sense input signals with amplitude of as low as 1mV.

Original languageEnglish
Title of host publication2014 IEEE Faible Tension Faible Consommation, FTFC 2014
PublisherIEEE Computer Society
ISBN (Print)9781479937738
DOIs
StatePublished - 1 Jan 2014
Externally publishedYes
Event2014 IEEE Faible Tension Faible Consommation, FTFC 2014 - Monaco, Monaco
Duration: 4 May 20146 May 2014

Publication series

Name2014 IEEE Faible Tension Faible Consommation, FTFC 2014

Conference

Conference2014 IEEE Faible Tension Faible Consommation, FTFC 2014
Country/TerritoryMonaco
CityMonaco
Period4/05/146/05/14

Fingerprint

Dive into the research topics of 'Analog readout circuit for zero leakage Planar-Hall-Effect-Magnetic-Random- Access-Memory'. Together they form a unique fingerprint.

Cite this