TY - GEN
T1 - Architectural comparison between VLIW and Vector processors
AU - Yuval, Gad
AU - Mendelson, Avi
AU - Greenberg, Shlomo
PY - 2012/12/1
Y1 - 2012/12/1
N2 - Emerging standards for wireless communication and multimedia involve complex digital signal processing (DSP) algorithms that require support for both typical DSP kernels and control-oriented tasks. Modern DSP processor architecture must meet the changing needs of DSP applications that target these very demanding standards. This paper considers the efficiency of selected DSP architectures and how they process the LTE software framework used in wireless communication. Three architectural approaches are compared - VLIW, Vector, and Hybrid approach - in terms of their performance, area, and power consumption. Performance analysis is based on a Performance Accurate Simulator (PAC) executing optimized code for each of the architectures. Area and power consumption estimates are based on a synthesis of an existing DSP processor employing a dedicated power simulator. The VLIW approach outperforms the other two architectures. However, results show that the Hybrid approach, which combines both VLIW and Vector processors, is the most efficient architecture in terms of performance-to-power ratio.
AB - Emerging standards for wireless communication and multimedia involve complex digital signal processing (DSP) algorithms that require support for both typical DSP kernels and control-oriented tasks. Modern DSP processor architecture must meet the changing needs of DSP applications that target these very demanding standards. This paper considers the efficiency of selected DSP architectures and how they process the LTE software framework used in wireless communication. Three architectural approaches are compared - VLIW, Vector, and Hybrid approach - in terms of their performance, area, and power consumption. Performance analysis is based on a Performance Accurate Simulator (PAC) executing optimized code for each of the architectures. Area and power consumption estimates are based on a synthesis of an existing DSP processor employing a dedicated power simulator. The VLIW approach outperforms the other two architectures. However, results show that the Hybrid approach, which combines both VLIW and Vector processors, is the most efficient architecture in terms of performance-to-power ratio.
UR - http://www.scopus.com/inward/record.url?scp=84871963601&partnerID=8YFLogxK
U2 - 10.1109/EEEI.2012.6377077
DO - 10.1109/EEEI.2012.6377077
M3 - Conference contribution
AN - SCOPUS:84871963601
SN - 9781467346801
T3 - 2012 IEEE 27th Convention of Electrical and Electronics Engineers in Israel, IEEEI 2012
BT - 2012 IEEE 27th Convention of Electrical and Electronics Engineers in Israel, IEEEI 2012
T2 - 2012 IEEE 27th Convention of Electrical and Electronics Engineers in Israel, IEEEI 2012
Y2 - 14 November 2012 through 17 November 2012
ER -