Architectural concepts of an optimal instruction set selection procedure machine

The paper deals with one of the most interesting problems encounted by computer architects, which is the problem of selecting the final instruction set of the designed computer which has also to support HLL (High Level Language). This problem becomes a major one, when the basic approach is aimed at the reduction of the computer's instruction set in order to achieve a cost effective RISC (Reduced Instruction Set Computer). The process of instruction set reduction is a very complex one. It concludes some major decisions directly affect the computer performances. When dealing with an instruction selection problem, one has to define the initial conditions and the expected performances. A research modular microcomputer named MODHEL which was designed to analyze the selection procedure has previously been proposed. While earlier papers dealt with the architecture, hardware organization and some preliminary analysis of the MODHEL, the present paper deals with the architectural concepts of a suboptimal instruction selection procedure. It gives a detailed discussion on the compromise concept and on the division of an initial instruction set to instruction modules. The MODHEL microcomputer is stack oriented with local and global areas of registers. The paper deals also with the handling of those resources in the most important module Mo and gives some examples to justify the design decisions made for efficient HLL support.