Architectures for Exponentiation Over GF(2n) Adopted for Smartcard Application

Benjamin Arazi

doi:10.1109/12.214694

Architectures for Exponentiation Over GF(2ⁿ) Adopted for Smartcard Application

Benjamin Arazi

Department of Electrical & Computer Engineering

Research output: Contribution to journal › Article › peer-review

5 Scopus citations

Abstract

Two exponentiation circuits over GF(2ⁿ) are proposed. Using the fact that squaring is a linear operation over GF(2ⁿ), a time-space tradeoff in smartcard-based circuitry is presented. It is further shown how multiplication is performed by a single shift, based on replacing the public key a^a ∊ GF(2ⁿ) by its minimal polynomial. Other considerations, related to structure regularity and the possible use of dynamic shift registers, are also treated.

Original language	English
Pages (from-to)	494-497
Number of pages	4
Journal	IEEE Transactions on Computers
Volume	42
Issue number	4
DOIs	https://doi.org/10.1109/12.214694
State	Published - 1 Jan 1993

Keywords

Cryptography
Galois fields
VLSI
finite field arithmetics
modular exponentiation
smartcards

ASJC Scopus subject areas

Software
Theoretical Computer Science
Hardware and Architecture
Computational Theory and Mathematics

Access to Document

10.1109/12.214694

Cite this

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