Architectures for Exponentiation Over GF(2n) Adopted for Smartcard Application

Benjamin Arazi

doi:10.1109/12.214694

Architectures for Exponentiation Over GF(2ⁿ) Adopted for Smartcard Application

Benjamin Arazi

Department of Electrical & Computer Engineering

Research output: Contribution to journal › Article › peer-review

5 Scopus citations

Abstract

Two exponentiation circuits over GF(2ⁿ) are proposed. Using the fact that squaring is a linear operation over GF(2ⁿ), a time-space tradeoff in smartcard-based circuitry is presented. It is further shown how multiplication is performed by a single shift, based on replacing the public key a^a ∊ GF(2ⁿ) by its minimal polynomial. Other considerations, related to structure regularity and the possible use of dynamic shift registers, are also treated.

Original language	English
Pages (from-to)	494-497
Number of pages	4
Journal	IEEE Transactions on Computers
Volume	42
Issue number	4
DOIs	https://doi.org/10.1109/12.214694
State	Published - 1 Jan 1993

Keywords

Cryptography
Galois fields
VLSI
finite field arithmetics
modular exponentiation
smartcards

ASJC Scopus subject areas

Software
Theoretical Computer Science
Hardware and Architecture
Computational Theory and Mathematics

Access to Document

10.1109/12.214694

Cite this

@article{6f43f5b483834f25a6d2a3a9986a72b1,

title = "Architectures for Exponentiation Over GF(2n) Adopted for Smartcard Application",

abstract = "Two exponentiation circuits over GF(2n) are proposed. Using the fact that squaring is a linear operation over GF(2n), a time-space tradeoff in smartcard-based circuitry is presented. It is further shown how multiplication is performed by a single shift, based on replacing the public key aa ∊ GF(2n) by its minimal polynomial. Other considerations, related to structure regularity and the possible use of dynamic shift registers, are also treated.",

keywords = "Cryptography, Galois fields, VLSI, finite field arithmetics, modular exponentiation, smartcards",

author = "Benjamin Arazi",

year = "1993",

month = jan,

day = "1",

doi = "10.1109/12.214694",

language = "English",

volume = "42",

pages = "494--497",

journal = "IEEE Transactions on Computers",

issn = "0018-9340",

publisher = "Institute of Electrical and Electronics Engineers",

number = "4",

}

TY - JOUR

T1 - Architectures for Exponentiation Over GF(2n) Adopted for Smartcard Application

AU - Arazi, Benjamin

PY - 1993/1/1

Y1 - 1993/1/1

N2 - Two exponentiation circuits over GF(2n) are proposed. Using the fact that squaring is a linear operation over GF(2n), a time-space tradeoff in smartcard-based circuitry is presented. It is further shown how multiplication is performed by a single shift, based on replacing the public key aa ∊ GF(2n) by its minimal polynomial. Other considerations, related to structure regularity and the possible use of dynamic shift registers, are also treated.

AB - Two exponentiation circuits over GF(2n) are proposed. Using the fact that squaring is a linear operation over GF(2n), a time-space tradeoff in smartcard-based circuitry is presented. It is further shown how multiplication is performed by a single shift, based on replacing the public key aa ∊ GF(2n) by its minimal polynomial. Other considerations, related to structure regularity and the possible use of dynamic shift registers, are also treated.

KW - Cryptography

KW - Galois fields

KW - VLSI

KW - finite field arithmetics

KW - modular exponentiation

KW - smartcards

UR - https://www.scopus.com/pages/publications/0027577326

U2 - 10.1109/12.214694

DO - 10.1109/12.214694

M3 - Article

AN - SCOPUS:0027577326

SN - 0018-9340

VL - 42

SP - 494

EP - 497

JO - IEEE Transactions on Computers

JF - IEEE Transactions on Computers

IS - 4

ER -