Challenges in CMOS imager design

O. Yadid-Pecht

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

In the last decade, Active Pixel Sensors (APS), which are fabricated in a commonly used CMOS process, enabled the design of image sensors with integrated "intelligence." Current state of the art CMOS imagers allow integration of all functions required for timing, exposure control, color processing, image enhancement, image compression and ADC on the same die. Moreover, systems with wide dynamic range, motion detection and non-standard readout can be designed. CMOS imagers also offer significant advantages in terms of low-power, low-voltage and monolithic integration, rivaling traditional Charge Coupled Devices (CCD). This talk will cover state of the art CMOS imager systems and design challenges with the advanced CMOS technologies available. Specifically, ways to improve power consumption in such "smart" sensors, required to cope with the current demand for portable systems are reviewed. In addition, pixel optimization is revisited as more advanced processes are used and pixel pitch is reduced.

Original languageEnglish
Title of host publication11th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2004
Pages240
Number of pages1
StatePublished - 1 Dec 2004
Event11th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2004 - Tel Aviv, Israel
Duration: 13 Dec 200415 Dec 2004

Publication series

Name11th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2004

Conference

Conference11th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2004
Country/TerritoryIsrael
CityTel Aviv
Period13/12/0415/12/04

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