Circuit partitioning via set partitioning and column generation

Moshe Eben-Chaime, Craig A. Tovey, Jane C. Ammons

Research output: Contribution to journalArticlepeer-review

6 Scopus citations

Abstract

In this paper, a new application of the methodology of set partitioning formulation augmented with heuristic column generation is presented. An efficient method for the partitioning of large-scale electronic circuits is developed based on this methodology. Circuit partitioning constitutes a major step of the physical design phase of electronic circuits, the fundamental components of electronic products. The major advantage of the scheme presented here is to provide a framework for an effective integration of most existing circuit partitioning methods. Another attractive feature of the current approach is the incorporation of interactive optimization: The circuit designer controls the operation of the procedure and enhances its performance by suggesting and/or requiring specific partitions. Following the development of the model, the solution approach is presented and computational results are reported for several benchmark circuits.

Original languageEnglish
Pages (from-to)65-76
Number of pages12
JournalOperations Research
Volume44
Issue number1
DOIs
StatePublished - 1 Jan 1996

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