TY - GEN
T1 - Effectiveness of matrix and pipeline FPGA-based arithmetic components of safety-related systems
AU - Drozd, Julia
AU - Drozd, Oleksandr
AU - Antoshchuk, Svetlana
AU - Kushnerov, Alex
AU - Nikul, Valery
N1 - Publisher Copyright:
© 2015 IEEE.
PY - 2015/11/30
Y1 - 2015/11/30
N2 - The paper is devoted to design of the digital components for safety-related instrumentation and control systems using the modern CAD tools. Traditionally, the digital components are built with matrix parallelism that reduces fault tolerance of circuits and safety of systems in their checkability. Circuits with bitwise pipeline data processing have advantage in checkability, but are considered as less efficient. Matrix and pipeline methods for multiplying the numbers are compared with respect to the ratio of throughput to complexity. To estimate the relative effectiveness of these methods the resource approach is applied. The obtained estimations are verified experimentally using the multipliers realized on FPGA. Qualitatively, the expected and experimental estimations are consistent, and the reasons of their quantitative deviations are analyzed1.
AB - The paper is devoted to design of the digital components for safety-related instrumentation and control systems using the modern CAD tools. Traditionally, the digital components are built with matrix parallelism that reduces fault tolerance of circuits and safety of systems in their checkability. Circuits with bitwise pipeline data processing have advantage in checkability, but are considered as less efficient. Matrix and pipeline methods for multiplying the numbers are compared with respect to the ratio of throughput to complexity. To estimate the relative effectiveness of these methods the resource approach is applied. The obtained estimations are verified experimentally using the multipliers realized on FPGA. Qualitatively, the expected and experimental estimations are consistent, and the reasons of their quantitative deviations are analyzed1.
KW - FPGA project
KW - arithmetical digital component
KW - complexity
KW - matrix and pipeline parallelism
KW - resource approach
KW - safety-related system
KW - throughput
UR - http://www.scopus.com/inward/record.url?scp=84957601872&partnerID=8YFLogxK
U2 - 10.1109/IDAACS.2015.7341410
DO - 10.1109/IDAACS.2015.7341410
M3 - Conference contribution
AN - SCOPUS:84957601872
T3 - Proceedings of the 2015 IEEE 8th International Conference on Intelligent Data Acquisition and Advanced Computing Systems: Technology and Applications, IDAACS 2015
SP - 785
EP - 789
BT - Proceedings of the 2015 IEEE 8th International Conference on Intelligent Data Acquisition and Advanced Computing Systems
PB - Institute of Electrical and Electronics Engineers
T2 - 8th IEEE International Conference on Intelligent Data Acquisition and Advanced Computing Systems, IDAACS 2015
Y2 - 24 September 2015 through 26 September 2015
ER -