TY - GEN
T1 - Efficient metastability-containing gray code 2-sort
AU - Lenzen, Christoph
AU - Medina, Moti
N1 - Publisher Copyright:
© 2016 IEEE.
PY - 2016/10/5
Y1 - 2016/10/5
N2 - It is well-established that unsynchronized communication across clock domains can result in metastable upsets and that this cannot be avoided deterministically. This, however, does not preclude the possibility that metastability can be contained deterministically, in the sense that meaningful and precise computations can be performed despite metastability of some bits. In this work, we provide evidence that this is not only possible, but can also be done efficiently. We propose a circuit of size O(B2) and depth O(B) that computes the minimum and maximum of two B-bit Gray code inputs, where each input may contain one metastable bit (introducing uncertainty regarding whether it encodes some value x or rather x + 1). This is achieved by combining the results of a recursive call on the (B - 1)-bit suffixes in a metastability-containing way. This overcomes the problem posed by possible metastability of the logic controlling the recursion, which must occur in some executions.
AB - It is well-established that unsynchronized communication across clock domains can result in metastable upsets and that this cannot be avoided deterministically. This, however, does not preclude the possibility that metastability can be contained deterministically, in the sense that meaningful and precise computations can be performed despite metastability of some bits. In this work, we provide evidence that this is not only possible, but can also be done efficiently. We propose a circuit of size O(B2) and depth O(B) that computes the minimum and maximum of two B-bit Gray code inputs, where each input may contain one metastable bit (introducing uncertainty regarding whether it encodes some value x or rather x + 1). This is achieved by combining the results of a recursive call on the (B - 1)-bit suffixes in a metastability-containing way. This overcomes the problem posed by possible metastability of the logic controlling the recursion, which must occur in some executions.
KW - combinational circuits
KW - metastability worst-case propagation model
KW - sorting networks
UR - http://www.scopus.com/inward/record.url?scp=84994631044&partnerID=8YFLogxK
U2 - 10.1109/ASYNC.2016.18
DO - 10.1109/ASYNC.2016.18
M3 - Conference contribution
AN - SCOPUS:84994631044
T3 - Proceedings - International Symposium on Asynchronous Circuits and Systems
SP - 49
EP - 56
BT - Proceedings - 22nd IEEE International Symposium on Asynchronous Circuits and Systems, ASYNC 2016
PB - Institute of Electrical and Electronics Engineers
T2 - 22nd IEEE International Symposium on Asynchronous Circuits and Systems, ASYNC 2016
Y2 - 8 May 2016 through 11 May 2016
ER -