TY - GEN
T1 - Exploring Multi-Parameter Optimization of Automated HLS Tools and the Difficulty of Setting Complex Constraints
AU - Shalom, Noam
AU - Levi, Itamar
N1 - Publisher Copyright:
© 2023 IEEE.
PY - 2023/1/1
Y1 - 2023/1/1
N2 - In standard design-processes of electronic systems much effort and expertise is required from engineers to produce a hardware description of the system and from this abstraction point, automation and synthesis tools bring the design to the gate level. In recent years, automatic tools have been developed whose purpose is to translate high-level languages directly into hardware language and thus to automatically realize a system up to the level of logic gates efficiently. The automatic tools strive to be as optimal as possible according to the needs of the application, but it appears in the article that there are concrete difficulties for the tools to do this optimally and that the intervention of the designer is still needed to achieve best results. In the paper we investigate and present how such tools work, what results are reached when simple symmetric and asymmetric structures are provided as inputs. And finally, we show how sub-optimal results are achieved either when vast freedom is given to the tool with multiple optimization parameters, and when complex optimization metrics are targeted, a task such tools are not specifically designed to solve. Even though, we posh forward that when numerous optimization pragmas are available by the tools, and as designs and optimization targets get more complex, such situations are quite inevitable. We highlight that additional flexibility is still needed to set complex constraints by the tools and that more automation is required. We demonstrate, on a simple example, gradually increasing complexity, towards an FFT processor (which generalizes many use cases), that significant gains can be achieved for complex structures needed in modern computation. The proposed automation is directed to aid the tools and the designer to better reach optimal implementations.
AB - In standard design-processes of electronic systems much effort and expertise is required from engineers to produce a hardware description of the system and from this abstraction point, automation and synthesis tools bring the design to the gate level. In recent years, automatic tools have been developed whose purpose is to translate high-level languages directly into hardware language and thus to automatically realize a system up to the level of logic gates efficiently. The automatic tools strive to be as optimal as possible according to the needs of the application, but it appears in the article that there are concrete difficulties for the tools to do this optimally and that the intervention of the designer is still needed to achieve best results. In the paper we investigate and present how such tools work, what results are reached when simple symmetric and asymmetric structures are provided as inputs. And finally, we show how sub-optimal results are achieved either when vast freedom is given to the tool with multiple optimization parameters, and when complex optimization metrics are targeted, a task such tools are not specifically designed to solve. Even though, we posh forward that when numerous optimization pragmas are available by the tools, and as designs and optimization targets get more complex, such situations are quite inevitable. We highlight that additional flexibility is still needed to set complex constraints by the tools and that more automation is required. We demonstrate, on a simple example, gradually increasing complexity, towards an FFT processor (which generalizes many use cases), that significant gains can be achieved for complex structures needed in modern computation. The proposed automation is directed to aid the tools and the designer to better reach optimal implementations.
KW - Design Automation
KW - Design tools
KW - FFT
KW - HLS
KW - High Level Synthesis
KW - Multi parameter
KW - Optimization
UR - https://www.scopus.com/pages/publications/85159712885
U2 - 10.1109/LASCAS56464.2023.10108151
DO - 10.1109/LASCAS56464.2023.10108151
M3 - Conference contribution
AN - SCOPUS:85159712885
T3 - LASCAS 2023 - 14th IEEE Latin American Symposium on Circuits and Systems, Proceedings
BT - LASCAS 2023 - 14th IEEE Latin American Symposium on Circuits and Systems, Proceedings
A2 - Huerta, Monica Karel
PB - Institute of Electrical and Electronics Engineers
T2 - 14th IEEE Latin American Symposium on Circuits and Systems, LASCAS 2023
Y2 - 27 February 2023 through 3 March 2023
ER -