Fabrication of a p–n Heterojunction Using Topological Insulator Bi₂Te₃–Si and Its Annealing Response

A junction device has been fabricated by growing p-type Bi₂Te₃ topological insulator (TI) film on an n-type silicon (Si) substrate using a thermal evaporation technique. Annealing using different temperatures and durations was employed to improve the quality of the film, as confirmed by microstructural study using x-ray diffraction (XRD) analysis and atomic force microscopy (AFM). The p–n diode characteristics of the junction devices were studied, and the effect of annealing investigated. An improved diode characteristic with good rectification ratio (RR) was observed for devices annealed for longer duration. Reduction in the leakage or reverse saturation current (I_R) was observed with increase in the annealing temperature. The forward-bias current (I_F) dropped in devices annealed above 400°C. The best results were observed for the sample device annealed at 450°C for 3 h, showing figure of merit (FOM) of 0.621 with RR ≈ 504 and I_R = 0.25 μA. In terms of ideality factor, the sample device annealed at 550°C for 2 h was found to be the best with n = 6.5, RR ≈ 52.4, I_R = 0.61 μA, and FOM = 0.358. The majority-carrier density (N_A) in the p-Bi₂Te₃ film of the heterojunction was found to be on the order of 10⁹/cm³ to 10¹¹/cm³, quite close to its intrinsic carrier concentration. These results are significant for fundamental understanding of device applications of TI materials as well as future applications in solar cells.