Full FPGA-based design of a PWM/CPM controller with integrated high-resolution fast ADC and DPWM peripherals

Yara Halihal; Yevgeny Bezdenezhnykh; Idan Ozana; Mor Mordechai Peretz

doi:10.1109/COMPEL.2014.6877116

Full FPGA-based design of a PWM/CPM controller with integrated high-resolution fast ADC and DPWM peripherals

Yara Halihal, Yevgeny Bezdenezhnykh, Idan Ozana, Mor Mordechai Peretz

Department of Electrical & Computer Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

13 Scopus citations

Abstract

This paper introduces the design and implementation of a full FPGA oriented PWM/CPM controller. The controller realization has been enabled by newly developed ADC and high-resolution DPWM peripheral units based on delay line technology that has been specially modified to FPGA design and constrains. The new ADC is capable of converting a sample with resolution of 10 bits within 300ns. The DPWM has demonstrated capability of producing 11bit signal at 1.6MHz. CPM operation is verified on a 12-48V, 100W boost converter.

Original language	English
Title of host publication	2014 IEEE 15th Workshop on Control and Modeling for Power Electronics, COMPEL 2014
Publisher	Institute of Electrical and Electronics Engineers
ISBN (Print)	9781479921478
DOIs	https://doi.org/10.1109/COMPEL.2014.6877116
State	Published - 1 Jan 2014
Event	2014 IEEE 15th Workshop on Control and Modeling for Power Electronics, COMPEL 2014 - Santander, Spain Duration: 22 Jun 2014 → 25 Jun 2014

Publication series

Name	2014 IEEE 15th Workshop on Control and Modeling for Power Electronics, COMPEL 2014

Conference

Conference	2014 IEEE 15th Workshop on Control and Modeling for Power Electronics, COMPEL 2014
Country/Territory	Spain
City	Santander
Period	22/06/14 → 25/06/14

ASJC Scopus subject areas

Electrical and Electronic Engineering
Modeling and Simulation

Access to Document

10.1109/COMPEL.2014.6877116

Cite this

Halihal, Y., Bezdenezhnykh, Y., Ozana, I., & Peretz, M. M. (2014). Full FPGA-based design of a PWM/CPM controller with integrated high-resolution fast ADC and DPWM peripherals. In 2014 IEEE 15th Workshop on Control and Modeling for Power Electronics, COMPEL 2014 Article 6877116 (2014 IEEE 15th Workshop on Control and Modeling for Power Electronics, COMPEL 2014). Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/COMPEL.2014.6877116

Halihal, Yara ; Bezdenezhnykh, Yevgeny ; Ozana, Idan et al. / Full FPGA-based design of a PWM/CPM controller with integrated high-resolution fast ADC and DPWM peripherals. 2014 IEEE 15th Workshop on Control and Modeling for Power Electronics, COMPEL 2014. Institute of Electrical and Electronics Engineers, 2014. (2014 IEEE 15th Workshop on Control and Modeling for Power Electronics, COMPEL 2014).

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abstract = "This paper introduces the design and implementation of a full FPGA oriented PWM/CPM controller. The controller realization has been enabled by newly developed ADC and high-resolution DPWM peripheral units based on delay line technology that has been specially modified to FPGA design and constrains. The new ADC is capable of converting a sample with resolution of 10 bits within 300ns. The DPWM has demonstrated capability of producing 11bit signal at 1.6MHz. CPM operation is verified on a 12-48V, 100W boost converter.",

author = "Yara Halihal and Yevgeny Bezdenezhnykh and Idan Ozana and Peretz, {Mor Mordechai}",

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Halihal, Y, Bezdenezhnykh, Y, Ozana, I & Peretz, MM 2014, Full FPGA-based design of a PWM/CPM controller with integrated high-resolution fast ADC and DPWM peripherals. in 2014 IEEE 15th Workshop on Control and Modeling for Power Electronics, COMPEL 2014., 6877116, 2014 IEEE 15th Workshop on Control and Modeling for Power Electronics, COMPEL 2014, Institute of Electrical and Electronics Engineers, 2014 IEEE 15th Workshop on Control and Modeling for Power Electronics, COMPEL 2014, Santander, Spain, 22/06/14. https://doi.org/10.1109/COMPEL.2014.6877116

Full FPGA-based design of a PWM/CPM controller with integrated high-resolution fast ADC and DPWM peripherals. / Halihal, Yara; Bezdenezhnykh, Yevgeny; Ozana, Idan et al.
2014 IEEE 15th Workshop on Control and Modeling for Power Electronics, COMPEL 2014. Institute of Electrical and Electronics Engineers, 2014. 6877116 (2014 IEEE 15th Workshop on Control and Modeling for Power Electronics, COMPEL 2014).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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Halihal Y, Bezdenezhnykh Y, Ozana I, Peretz MM. Full FPGA-based design of a PWM/CPM controller with integrated high-resolution fast ADC and DPWM peripherals. In 2014 IEEE 15th Workshop on Control and Modeling for Power Electronics, COMPEL 2014. Institute of Electrical and Electronics Engineers. 2014. 6877116. (2014 IEEE 15th Workshop on Control and Modeling for Power Electronics, COMPEL 2014). doi: 10.1109/COMPEL.2014.6877116

Full FPGA-based design of a PWM/CPM controller with integrated high-resolution fast ADC and DPWM peripherals

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