Full-swing gate diffusion input logic - Case-study of low-power CLA adder design

Arkadiy Morgenshtein, Viacheslav Yuzhaninov, Alexey Kovshilovsky, Alexander Fish

Research output: Contribution to journalArticlepeer-review

56 Scopus citations

Abstract

Full Swing Gate Diffusion Input (FS-GDI) methodology is presented. The proposed methodology is applied to a 40 nm Carry Look Ahead Adder (CLA). The CLA is implemented mainly using GDI full-swing F1 and F2 gates, which are the counterparts of standard CMOS NAND and NOR gates. A 16-bit GDI CLA was designed in a 40 nm low power TSMC process. The CLA, implemented according to the proposed methodology, presents full functionality and robustness under global and local process variations at wide range of supply voltages. Simulation results show 2× area reduction, 5× improvement in dynamic energy dissipation and 4× decrease in leakage, with a slight (24%) degradation in performance, when compared to the CMOS CLA. Advanced design metrics of GDI cells, such as minimum energy point (MEP) operation and minimum leakage vector (MLV), are discussed.

Original languageEnglish
Pages (from-to)62-70
Number of pages9
JournalIntegration, the VLSI Journal
Volume47
Issue number1
DOIs
StatePublished - 1 Jan 2014
Externally publishedYes

Keywords

  • Alternative logic family
  • Carry Look Ahead (CLA) adder
  • Full-Swing GDI
  • Gate Difusion Input (GDI)
  • Low power

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