GDI (Gate Diffusion Input) - a new technique of low power digital combinatorial circuit design is described. This technique allows reducing power consumption, delay and area of digital circuits, while maintaining low complexity of logic design. A detailed design methodology is described. Performance comparison with traditional CMOS and PTL design techniques is presented. The different methods are compared with respect to the layout area, number of devices, delay and power dissipation. Several logic circuits have been implemented in various design styles. Their properties are discussed, simulation results are reported.
|Number of pages||5|
|Journal||Proceedings of the Annual IEEE International ASIC Conference and Exhibit|
|State||Published - 1 Jan 2001|
|Event||14th Annual IEEE International ASIC/SOC Conference- System-on-Chip in a Networked World- - Arlington, VA, United States|
Duration: 12 Sep 2001 → 15 Sep 2001
ASJC Scopus subject areas
- Electrical and Electronic Engineering