IBM z14: Processor characterization and power management for high-reliability mainframe systems

Christopher Berry; David Wolpert; Christos Vezrytzis; Richard Rizzolo; Sean Carey; Yaniv Maroz; Hunter Shi; Dureseti Chidambarrao; Christian Jacobi; Anthony Saporito; Thomas Strach; Alper Buyuktosunoglu; Preetham Lobo; Pierce Chuang; Pawel Owczarczyk; Ramon Bertran; Tobias Webel; Phillip J. Restle

doi:10.1109/JSSC.2018.2873582

IBM z14: Processor characterization and power management for high-reliability mainframe systems

Christopher Berry
, David Wolpert
, Christos Vezrytzis
, Richard Rizzolo
, Sean Carey
, Yaniv Maroz
, Hunter Shi
, Dureseti Chidambarrao
, Christian Jacobi
, Anthony Saporito
, Thomas Strach
, Alper Buyuktosunoglu
, Preetham Lobo
, Pierce Chuang
, Pawel Owczarczyk
, Ramon Bertran
, Tobias Webel
, Phillip J. Restle

Research output: Contribution to journal › Article › peer-review

19 Scopus citations

Abstract

The IBM z14 is the latest update in the storied history of IBM mainframes. Reliability, availability, security, and scalability are the foundation of the IBM mainframe line. System reliability and availability targets are in excess of 10 years, requiring rigorous chip characterization processes. In this paper, we discuss some of the many processes used to ensure that lifetime. An additional part of this reliability is power management (PM). The 5.2-GHz high-power design of the central processor chip requires advanced on-die PM capabilities to adapt to power intensive instruction streams. We also discuss a number of improvements to the critical path monitoring design used to manage power supply voltage droops, reducing response time and the impact on system performance. Finally, we compare a set of simulations and hardware results to validate our power fluctuation models.

Original language	English
Article number	8533619
Pages (from-to)	121-132
Number of pages	12
Journal	IEEE Journal of Solid-State Circuits
Volume	54
Issue number	1
DOIs	https://doi.org/10.1109/JSSC.2018.2873582
State	Published - 1 Jan 2019
Externally published	Yes

Keywords

Cache
IBM
characterization
computer
critical path monitor (CPM)
droop
mainframe
microprocessor
simultaneous multithreading (SMT)
system
transistor
very large scale integration (VLSI)
yield
z14

ASJC Scopus subject areas

Electrical and Electronic Engineering

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10.1109/JSSC.2018.2873582

Cite this

Berry, C., Wolpert, D., Vezrytzis, C., Rizzolo, R., Carey, S., Maroz, Y., Shi, H., Chidambarrao, D., Jacobi, C., Saporito, A., Strach, T., Buyuktosunoglu, A., Lobo, P., Chuang, P., Owczarczyk, P., Bertran, R., Webel, T., & Restle, P. J. (2019). IBM z14: Processor characterization and power management for high-reliability mainframe systems. IEEE Journal of Solid-State Circuits, 54(1), 121-132. Article 8533619. https://doi.org/10.1109/JSSC.2018.2873582

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title = "IBM z14: Processor characterization and power management for high-reliability mainframe systems",

abstract = "The IBM z14 is the latest update in the storied history of IBM mainframes. Reliability, availability, security, and scalability are the foundation of the IBM mainframe line. System reliability and availability targets are in excess of 10 years, requiring rigorous chip characterization processes. In this paper, we discuss some of the many processes used to ensure that lifetime. An additional part of this reliability is power management (PM). The 5.2-GHz high-power design of the central processor chip requires advanced on-die PM capabilities to adapt to power intensive instruction streams. We also discuss a number of improvements to the critical path monitoring design used to manage power supply voltage droops, reducing response time and the impact on system performance. Finally, we compare a set of simulations and hardware results to validate our power fluctuation models.",

keywords = "Cache, IBM, characterization, computer, critical path monitor (CPM), droop, mainframe, microprocessor, simultaneous multithreading (SMT), system, transistor, very large scale integration (VLSI), yield, z14",

author = "Christopher Berry and David Wolpert and Christos Vezrytzis and Richard Rizzolo and Sean Carey and Yaniv Maroz and Hunter Shi and Dureseti Chidambarrao and Christian Jacobi and Anthony Saporito and Thomas Strach and Alper Buyuktosunoglu and Preetham Lobo and Pierce Chuang and Pawel Owczarczyk and Ramon Bertran and Tobias Webel and Restle, \{Phillip J.\}",

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doi = "10.1109/JSSC.2018.2873582",

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Berry, C, Wolpert, D, Vezrytzis, C, Rizzolo, R, Carey, S, Maroz, Y, Shi, H, Chidambarrao, D, Jacobi, C, Saporito, A, Strach, T, Buyuktosunoglu, A, Lobo, P, Chuang, P, Owczarczyk, P, Bertran, R, Webel, T & Restle, PJ 2019, 'IBM z14: Processor characterization and power management for high-reliability mainframe systems', IEEE Journal of Solid-State Circuits, vol. 54, no. 1, 8533619, pp. 121-132. https://doi.org/10.1109/JSSC.2018.2873582

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AU - Carey, Sean

AU - Maroz, Yaniv

AU - Shi, Hunter

AU - Chidambarrao, Dureseti

AU - Jacobi, Christian

AU - Saporito, Anthony

AU - Strach, Thomas

AU - Buyuktosunoglu, Alper

AU - Lobo, Preetham

AU - Chuang, Pierce

AU - Owczarczyk, Pawel

AU - Bertran, Ramon

AU - Webel, Tobias

AU - Restle, Phillip J.

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IBM z14: Processor characterization and power management for high-reliability mainframe systems

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Keywords

ASJC Scopus subject areas

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