Improvement of pipelines implementation in FPGA designs

Nonel Thirer, Yitzhak David, I. Baal Zedaka, Uzi Efron

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

System architecture has a significant impact on software performance. In this manuscript, a method to increase the performance of the microprocessors and FPGA based systems using pipeline processing, is presented. An improved implementation using this concept, for image and display processing, providing real time vision applications, is described.

Original languageEnglish
Title of host publicationInfrared and Photoelectronic Imagers and Detector Devices II
DOIs
StatePublished - 6 Nov 2006
EventInfrared and Photoelectronic Imagers and Detector Devices II - San Diego, CA, United States
Duration: 13 Aug 200614 Aug 2006

Publication series

NameProceedings of SPIE - The International Society for Optical Engineering
Volume6294
ISSN (Print)0277-786X

Conference

ConferenceInfrared and Photoelectronic Imagers and Detector Devices II
Country/TerritoryUnited States
CitySan Diego, CA
Period13/08/0614/08/06

Keywords

  • FPGA design
  • Image transceiver
  • Pipeline
  • Superscalar
  • Vision

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Computer Science Applications
  • Applied Mathematics
  • Electrical and Electronic Engineering

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