Leakage power attack-resilient symmetrical 8T SRAM cell

Robert Giterman, Maoz Vicentowski, Itamar Levi, Yoav Weizman, Osnat Keren, Alexander Fish

Research output: Contribution to journalArticlepeer-review

8 Scopus citations

Abstract

Power analysis attacks have become a serious threat to security systems by enabling secret data extraction using side-channel leakage information. Embedded memories, often implemented with 6T SRAM cells, serve as a key component in many of these systems. However, conventional SRAM cells are prone to side-channel leakage power attacks. To provide resiliency to these types of attacks, we propose a symmetric 8T SRAM cell which incorporates two more transistors than the conventional 6T cell to significantly reduce the correlation between the stored data and the leakage currents. To demonstrate the improved security of the suggested memory array, both cells were implemented in a 65-nm CMOS technology. Simulation results, including Monte Carlo analysis and signal-to-noise ratio comparison, illustrate the resiliency of the 8T cell to leakage power attacks.

Original languageEnglish
Article number8374988
Pages (from-to)2180-2184
Number of pages5
JournalIEEE Transactions on Very Large Scale Integration (VLSI) Systems
Volume26
Issue number10
DOIs
StatePublished - 1 Oct 2018
Externally publishedYes

Keywords

  • Differential power analysis (DPA)
  • leakage power analysis (LPA)
  • side-channel attacks (SCA)
  • static random access memory (SRAM)

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