TY - GEN
T1 - Low Power, Energy Efficient and High Performance Triple Mode Logic for IoT Applications
AU - Shavit, Netanel
AU - Stanger, Inbal
AU - Taco, Ramiro
AU - Yavits, Leonid
AU - Fish, Alexander
N1 - Publisher Copyright:
© 2024 IEEE.
PY - 2024/1/1
Y1 - 2024/1/1
N2 - IoT devices often face conflicting power and performance requirements. They might be required to dynamically switch between (1) power-saving battery-powered mode, (2) ultra-low harvested power mode, and (3) high-performance real-time operation. In this work, we present a novel Triple Mode Logic (TML) that addresses the aforementioned requirements and enables ultra-low power mode for purely harvested operation, energy-saving mode for battery-powered operation, and accelerated mode for high-performance operation. Simulation results of several TML benchmarks indicate that in ultra-low power mode, TML reduces the power consumption by approximately five orders of magnitude compared to CMOS. In normal static (energy-saving) mode, TML consumes up to 35% less energy than Dual Mode Standard Cell (DMSC) state-of-the-art solution. In normal dynamic (high-performance) mode, TML is faster than the DMSC solution by up to 43%.
AB - IoT devices often face conflicting power and performance requirements. They might be required to dynamically switch between (1) power-saving battery-powered mode, (2) ultra-low harvested power mode, and (3) high-performance real-time operation. In this work, we present a novel Triple Mode Logic (TML) that addresses the aforementioned requirements and enables ultra-low power mode for purely harvested operation, energy-saving mode for battery-powered operation, and accelerated mode for high-performance operation. Simulation results of several TML benchmarks indicate that in ultra-low power mode, TML reduces the power consumption by approximately five orders of magnitude compared to CMOS. In normal static (energy-saving) mode, TML consumes up to 35% less energy than Dual Mode Standard Cell (DMSC) state-of-the-art solution. In normal dynamic (high-performance) mode, TML is faster than the DMSC solution by up to 43%.
KW - Dual Mode Logic (DML)
KW - Dual Mode Standard Cell (DMSC)
KW - Dynamic Leakage-Suppression (DLS) logic
KW - IoT
KW - Leakage Suppression Mode (LSM)
KW - Triple Mode Logic (TML)
KW - logic gates
KW - low power
UR - http://www.scopus.com/inward/record.url?scp=85199257531&partnerID=8YFLogxK
U2 - 10.1109/PRIME61930.2024.10559729
DO - 10.1109/PRIME61930.2024.10559729
M3 - Conference contribution
AN - SCOPUS:85199257531
T3 - 2024 19th Conference on Ph.D Research in Microelectronics and Electronics, PRIME 2024
BT - 2024 19th Conference on Ph.D Research in Microelectronics and Electronics, PRIME 2024
PB - Institute of Electrical and Electronics Engineers
T2 - 19th Conference on Ph.D Research in Microelectronics and Electronics, PRIME 2024
Y2 - 9 June 2024 through 12 June 2024
ER -
