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Low voltage dual mode logic: Model analysis and parameter extraction
I. Levi, A. Kaizerman, A. Fish
Department of Electrical & Computer Engineering
Research output
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Contribution to journal
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Article
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peer-review
35
Scopus citations
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Dive into the research topics of 'Low voltage dual mode logic: Model analysis and parameter extraction'. Together they form a unique fingerprint.
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Keyphrases
Low Voltage
100%
Dual Mode Logic
100%
Parameter Extraction
100%
Logic Model
100%
Dual Model
100%
Logic Gates
25%
Static Mode
25%
Dynamic Mode
25%
Low Power
12%
Monte Carlo Simulation
12%
Operation Mode
12%
Design Techniques
12%
Process Variation
12%
Low Power Consumption
12%
Subthreshold Region
12%
Logic Family
12%
System Requirements
12%
Domino
12%
High Performance
12%
Energy Performance
12%
Standard CMOS Technology
12%
Sizing Methodology
12%
Design Methodology
12%
Logic Gate Operation
12%
Full Adder
12%
Very Low Energy
12%
Alternative Design
12%
Basic Gates
12%
Design Example
12%
Logical Effort
12%
High Energy Consumption
12%
Energy Consumption
12%
Near-threshold Region
12%
Subthreshold Operation
12%
Power Standard
12%
Low Power Digital Design
12%
Engineering
Logic Gate
100%
Mode Dynamic
66%
Energy Engineering
33%
Supply Voltage
33%
Design Technique
33%
Process Variation
33%
System Requirement
33%