Machine-learning-based circuit synthesis

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    4 Scopus citations

    Abstract

    Multi-level logic synthesis is a problem of immense practical significance, and is a key to developing circuits that optimize a number of parameters, such as depth, energy dissipation, reliability, etc. The problem can be defined as the task of taking a collection of components from which one wants to synthesize a circuit that optimizes a particular objective function. This problem is computationally hard, and there are very few automated approaches for its solution. To solve this problem we propose an algorithm, called Circuit-Decomposition Engine (CDE), that is based on learning decision trees, and uses a greedy approach for function learning. We empirically demonstrate that CDE, when given a library of different component types, can learn the function of Disjunctive Normal Form (DNF) Boolean representations and synthesize circuit structure using the input library. We compare the structure of the synthesized circuits with that of well-known circuits using a range of circuit similarity metrics.

    Original languageEnglish
    Title of host publication2012 IEEE 27th Convention of Electrical and Electronics Engineers in Israel, IEEEI 2012
    DOIs
    StatePublished - 1 Dec 2012
    Event2012 IEEE 27th Convention of Electrical and Electronics Engineers in Israel, IEEEI 2012 - Eilat, Israel
    Duration: 14 Nov 201217 Nov 2012

    Publication series

    Name2012 IEEE 27th Convention of Electrical and Electronics Engineers in Israel, IEEEI 2012

    Conference

    Conference2012 IEEE 27th Convention of Electrical and Electronics Engineers in Israel, IEEEI 2012
    Country/TerritoryIsrael
    CityEilat
    Period14/11/1217/11/12

    ASJC Scopus subject areas

    • Electrical and Electronic Engineering

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