Machine-learning-based circuit synthesis

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    2 Scopus citations

    Abstract

    Multi-level logic synthesis is a problem of immense practical significance, and is a key to developing circuits that optimize a number of parameters, such as depth, energy dissipation, reliability, etc. The problem can be defined as the task of taking a collection of components from which one wants to synthesize a circuit that optimizes a particular objective function. This problem is computationally hard, and there are very few automated approaches for its solution. To solve this problem we propose an algorithm, called Circuit-Decomposition Engine (CDE), that is based on learning decision trees, and uses a greedy approach for function learning. We empirically demonstrate that CDE, when given a library of different component types, can learn the function of Disjunctive Normal Form (DNF) Boolean representations and synthesize circuit structure using the input library. We compare the structure of the synthesized circuits with that of well-known circuits using a range of circuit similarity metrics.

    Original languageEnglish
    Title of host publicationIJCAI 2013 - Proceedings of the 23rd International Joint Conference on Artificial Intelligence
    Pages1635-1641
    Number of pages7
    StatePublished - 1 Dec 2013
    Event23rd International Joint Conference on Artificial Intelligence, IJCAI 2013 - Beijing, China
    Duration: 3 Aug 20139 Aug 2013

    Publication series

    NameIJCAI International Joint Conference on Artificial Intelligence
    ISSN (Print)1045-0823

    Conference

    Conference23rd International Joint Conference on Artificial Intelligence, IJCAI 2013
    Country/TerritoryChina
    CityBeijing
    Period3/08/139/08/13

    ASJC Scopus subject areas

    • Artificial Intelligence

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