@inproceedings{0d555d7a0ae54b279be5f7f0cafb1786,
title = "Memory Processing Unit for in-memory processing",
abstract = "Performance and energy of modern computers, usually built as von Neumann machines, are primarily limited by data transfer from the memory to the CPU and vice versa. Only a true non-von Neumann architecture, where data is processed and stored within the same unit can remove this bottleneck. Using emerging non-volatile resistive memory technologies (namely, memristors) enables the development of Memory Processing Unit (MPU)-a novel non-von Neumann architecture. MPU relies on adding computing capabilities to the memristive memory cells without changing the basic memory array structure, and is compatible with existing computing systems. This paper describes the MPU architecture and examines its controller.",
keywords = "CPU, Crossbar memory, MAGIC, MPU, Memristive systems, logic design, memory controller, memristor",
author = "Hur, \{Rotem Ben\} and Shahar Kvatinsky",
note = "Publisher Copyright: {\textcopyright} 2016 ACM.; 2016 IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2016 ; Conference date: 18-07-2016 Through 20-07-2016",
year = "2016",
month = sep,
day = "14",
doi = "10.1145/2950067.2950086",
language = "English",
series = "Proceedings of the 2016 IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2016",
publisher = "Presses Polytechniques et Universitaires Romandes",
pages = "171--172",
booktitle = "Proceedings of the 2016 IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2016",
}