TY - GEN
T1 - Memristive logic
T2 - 27th International Symposium on Power and Timing Modeling, Optimization and Simulation, PATMOS 2017
AU - Reuben, John
AU - Ben-Hur, Rotem
AU - Wald, Nimrod
AU - Talati, Nishil
AU - Haj Ali, Ameer
AU - Gaillardon, Pierre Emmanuel
AU - Kvatinsky, Shahar
N1 - Funding Information:
This research was partially supported by Intel Collaborative Research Institute for Computational Intelligence (ICRI-CI), by the Viterbi Fellowship in the Technion Computer Engineering Center, and by EU COST Action IC1401.
Publisher Copyright:
© 2017 IEEE
PY - 2017/11/13
Y1 - 2017/11/13
N2 - Memristors have extended their influence beyond memory to logic and in-memory computing. Memristive logic design, the methodology of designing logic circuits using memristors, is an emerging concept whose growth is fueled by the quest for energy efficient computing systems. As a result, many memristive logic families have evolved with different attributes, and a mature comparison among them is needed to judge their merit. This paper presents a framework for comparing logic families by classifying them on the basis of fundamental properties such as statefulness, proximity (from the memory array), and flexibility of computation. We propose metrics to compare memristive logic families using analytic expressions for performance (latency), energy efficiency, and area. Then, we provide guidelines for a holistic comparison of logic families and set the stage for the evolution of new logic families.
AB - Memristors have extended their influence beyond memory to logic and in-memory computing. Memristive logic design, the methodology of designing logic circuits using memristors, is an emerging concept whose growth is fueled by the quest for energy efficient computing systems. As a result, many memristive logic families have evolved with different attributes, and a mature comparison among them is needed to judge their merit. This paper presents a framework for comparing logic families by classifying them on the basis of fundamental properties such as statefulness, proximity (from the memory array), and flexibility of computation. We propose metrics to compare memristive logic families using analytic expressions for performance (latency), energy efficiency, and area. Then, we provide guidelines for a holistic comparison of logic families and set the stage for the evolution of new logic families.
UR - http://www.scopus.com/inward/record.url?scp=85043472442&partnerID=8YFLogxK
U2 - 10.1109/PATMOS.2017.8106959
DO - 10.1109/PATMOS.2017.8106959
M3 - Conference contribution
AN - SCOPUS:85043472442
T3 - 2017 27th International Symposium on Power and Timing Modeling, Optimization and Simulation, PATMOS 2017
SP - 1
EP - 8
BT - 2017 27th International Symposium on Power and Timing Modeling, Optimization and Simulation, PATMOS 2017
PB - Institute of Electrical and Electronics Engineers
Y2 - 25 September 2017 through 27 September 2017
ER -
