mMPU: Building a Memristor-based General-purpose In-memory Computation Architecture

This chapter presents a memristor-based, general-purpose architecture, called the memristive memory processing unit (mMPU), and describes its structure in a bottom-up approach, from the manner in which the calculation is performed in-memory, to the memory controller architecture. The memristor device can function as both a memory element and a processing unit, thus enabling performance of in-memory computation and avoiding massive data transfer. There are three modes of mMPU architecture: memory-only (where the memristive memory acts as a standard memory), accelerator (where the memory is used to process data and accelerate calculations), and hybrid (which combines both the memory-only and accelerator modes). The chapter focuses on the accelerator mode and on the MAGIC NOR gate and explains how any logic can be executed using this gate. It also explains how an algorithm can be mapped onto the memristive crossbar and automatically executed using MAGIC NOR gates, in SIMPLE and SIMPLER mapping techniques.