TY - JOUR
T1 - Monolithic integration of Giant Magnetoresistance (GMR) devices onto standard processed CMOS dies
AU - Cubells-Beltrán, M. Dolores
AU - Reig, C.
AU - De Marcellis, A.
AU - Figueras, E.
AU - Yúfera, A.
AU - Zadov, B.
AU - Paperno, E.
AU - Cardoso, S.
AU - Freitas, P. P.
N1 - Funding Information:
Part of the work has been carried out under projects: UVINV-AE11-40892 ( Universitat de València ) and GICSERV2011-NGG-229 ( IMB-CNM, CSIC ). INESC -MN acknowledges FCT funding through the Instituto de Nanociência e Nanotecnologia (IN) Associated Laboratory. The help of J. Bernardo with the mask alignment and wire bonding is deeply acknowledged. The co-author A. De Marcellis acknowledges the Research Fellowship from Universitat de València (Sub-Program “Attracting Talent” - VLC-CAMPUS 2013).
PY - 2014/1/1
Y1 - 2014/1/1
N2 - Giant Magnetoresistance (GMR) based technology is nowadays the preferred option for low magnetic fields sensing in disciplines such as biotechnology or microelectronics. Their compatibility with standard CMOS processes is currently investigated as a key point for the development of novel applications, requiring compact electronic readout. In this paper, such compatibility has been experimentally studied with two particular non-dedicated CMOS standards: 0.35 μm from AMS (Austria MicroSystems) and 2.5 μm from CNM (Centre Nacional de Microelectrònica, Barcelona) as representative examples. GMR test devices have been designed and fabricated onto processed chips from both technologies. In order to evaluate so obtained devices, an extended characterization has been carried out including DC magnetic measurements and noise analysis. Moreover, a 2D-FEM (Finite Element Method) model, including the dependence of the GMR device resistance with the magnetic field, has been also developed and simulated. Its potential use as electric current sensors at the integrated circuit level has also been demonstrated.
AB - Giant Magnetoresistance (GMR) based technology is nowadays the preferred option for low magnetic fields sensing in disciplines such as biotechnology or microelectronics. Their compatibility with standard CMOS processes is currently investigated as a key point for the development of novel applications, requiring compact electronic readout. In this paper, such compatibility has been experimentally studied with two particular non-dedicated CMOS standards: 0.35 μm from AMS (Austria MicroSystems) and 2.5 μm from CNM (Centre Nacional de Microelectrònica, Barcelona) as representative examples. GMR test devices have been designed and fabricated onto processed chips from both technologies. In order to evaluate so obtained devices, an extended characterization has been carried out including DC magnetic measurements and noise analysis. Moreover, a 2D-FEM (Finite Element Method) model, including the dependence of the GMR device resistance with the magnetic field, has been also developed and simulated. Its potential use as electric current sensors at the integrated circuit level has also been demonstrated.
KW - CMOS
KW - GMR
KW - Integrated current sensor
KW - Monolithic integration
UR - http://www.scopus.com/inward/record.url?scp=84900434803&partnerID=8YFLogxK
U2 - 10.1016/j.mejo.2014.03.015
DO - 10.1016/j.mejo.2014.03.015
M3 - Article
AN - SCOPUS:84900434803
SN - 0026-2692
VL - 45
SP - 702
EP - 707
JO - Microelectronics Journal
JF - Microelectronics Journal
IS - 6
ER -