TY - GEN
T1 - Multibit Δ∑ CMOS DAC employing enhanced noise-shaped DEM architecture
AU - Akselrod, Dmitry
AU - Greenberg, Shlomo
AU - Hava, Shlomo
PY - 2004/12/1
Y1 - 2004/12/1
N2 - A multibit Delta-Sigma (Δ∑) DAC employing enhanced noise-shaped Dynamic Element Matching (DEM) architecture is presented. The architecture for implementing a noise-shaped DEM algorithm for use in multibit Delta-Sigma (Δ∑) converters is analyzed. The suggested architecture shows the performance improvement as compared to previous solutions. System operation is discussed and hardware realization of the proposed architecture is described. A five-level Δ∑ Digital-to-Analog (D/A) converter incorporating the proposed DEM architecture has been fabricated in a 0.12-μm single-poly CMOS process. Finally, measured results are presented.
AB - A multibit Delta-Sigma (Δ∑) DAC employing enhanced noise-shaped Dynamic Element Matching (DEM) architecture is presented. The architecture for implementing a noise-shaped DEM algorithm for use in multibit Delta-Sigma (Δ∑) converters is analyzed. The suggested architecture shows the performance improvement as compared to previous solutions. System operation is discussed and hardware realization of the proposed architecture is described. A five-level Δ∑ Digital-to-Analog (D/A) converter incorporating the proposed DEM architecture has been fabricated in a 0.12-μm single-poly CMOS process. Finally, measured results are presented.
UR - http://www.scopus.com/inward/record.url?scp=27644506986&partnerID=8YFLogxK
M3 - Conference contribution
AN - SCOPUS:27644506986
SN - 0780387155
T3 - 11th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2004
SP - 117
EP - 120
BT - 11th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2004
T2 - 11th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2004
Y2 - 13 December 2004 through 15 December 2004
ER -