On the characterization of until as a fixed point under clocked semantics

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4 Scopus citations


Modern hardware designs are typically based on multiple clocks. While a singly-clocked hardware design is easily described in standard temporal logics, describing a multiply-clocked design is cumbersome. Thus, it is desirable to have an easier way to formulate properties related to clocks in a temporal logic. In [6] a relatively simple solution built on top of the traditional ltl semantics was suggested and adopted by the IEEE standard temporal logic psl. The suggested semantics was examined relative to a list of design goals, and it was shown that it answered all requirements except for preserving the least fixed point characterization of the until operator under multiple clocks. In this work we show that with a minor addition to the semantics of [6] this requirement is met as well.

Original languageEnglish
Title of host publicationHardware and Software
Subtitle of host publicationVerification and Testing - Third International Haifa Verification Conference, HVC 2007, Proceedings
Number of pages15
StatePublished - 27 Aug 2008
Externally publishedYes
Event3rd International Haifa Verification Conference, HVC 2007 - Haifa, Israel
Duration: 23 Oct 200725 Oct 2007

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume4899 LNCS
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349


Conference3rd International Haifa Verification Conference, HVC 2007

ASJC Scopus subject areas

  • Theoretical Computer Science
  • General Computer Science


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