Abstract
This paper provides a modeling approach for dealing with the challenging question of trade-off between capital utilization and production efficiency in semiconductor manufacturing where the ultimate goal is of maximum output at maximum velocity and minimum cost. Full fab simulation is used iteratively between models of 'horizontal' and 'vertical' simulations in order to rapidly generate results for different possible states of the fab with varying capital costs, matched cycle time (CT), and fixed throughput rate, so as to determine the most efficient operating condition for the fab with respect to cost, CT, and output.
| Original language | English |
|---|---|
| Title of host publication | Proceedings of the 2014 Winter Simulation Conference, WSC 2014 |
| Editors | Andreas Tolk, Levent Yilmaz, Saikou Y. Diallo, Ilya O. Ryzhov |
| Publisher | Institute of Electrical and Electronics Engineers |
| Pages | 2617-2627 |
| Number of pages | 11 |
| ISBN (Electronic) | 9781479974863 |
| DOIs | |
| State | Published - 23 Jan 2015 |
| Externally published | Yes |
| Event | 2014 Winter Simulation Conference, WSC 2014 - Savannah, United States Duration: 7 Dec 2014 → 10 Dec 2014 |
Publication series
| Name | Proceedings - Winter Simulation Conference |
|---|---|
| Volume | 2015-January |
| ISSN (Print) | 0891-7736 |
Conference
| Conference | 2014 Winter Simulation Conference, WSC 2014 |
|---|---|
| Country/Territory | United States |
| City | Savannah |
| Period | 7/12/14 → 10/12/14 |
UN SDGs
This output contributes to the following UN Sustainable Development Goals (SDGs)
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SDG 9 Industry, Innovation, and Infrastructure
ASJC Scopus subject areas
- Software
- Modeling and Simulation
- Computer Science Applications
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