Abstract
This paper details efficiency analysis and characteristics of a gyrator switched-resonator converter (GSwRC) IC. Followed by an efficiency analysis, this paper introduces an optimized size-efficiency design procedure for IC realization of the converter. In area-sensitive applications, the optimization method combined with the converter's benefits presents an attractive approach for power delivery in point-of-load applications. To verify the analytical framework, two sets of bridge-type GSwRCs prototypes have been evaluated. One is an on-chip bridge GSwRC that has been fabricated in 0.18- μm 5-V CMOS process, according to the principles detailed in this paper, and verified through postlayout analysis and experimental measurements of the fabricated IC. The second prototype is a discrete GSwRC that is used for further validation of the theoretical framework. In addition, the analysis has been verified through a design example of a multiphase resonant switched-capacitor converter. The fabricated IC prototype operation is demonstrated with 1.5 A, delivering up to 2.25 W from 3-V input voltage, with peak efficiency at 85%. A fully monolithic controller to regulate the output voltage is described and implemented on-chip by an automated synthesis process and place-and-route tools.
| Original language | English |
|---|---|
| Pages (from-to) | 549-562 |
| Number of pages | 14 |
| Journal | IEEE Journal of Emerging and Selected Topics in Power Electronics |
| Volume | 6 |
| Issue number | 2 |
| DOIs | |
| State | Published - 1 Jun 2018 |
Keywords
- IC
- on-chip voltage regulator
- optimization
- power supply on-chip
- resonant switched-capacitor converter (SCC)
- size efficiency
- switched-resonator converters
- zero-current switching (ZCS)
ASJC Scopus subject areas
- Energy Engineering and Power Technology
- Electrical and Electronic Engineering