Abstract
Type-II and proportional–integrative (PI) compensators are often employed as dc-link voltage controllers in practical single-phase power factor correction rectifiers (PFCRs). The corresponding controller coefficients are typically designed in frequency domain according to a rule-of-thumb imposing crossover frequency around 10 Hz, yielding unnecessarily high (>45°) phase margin (PM). Recently, analytical guidelines for deriving PI controller coefficients set, allowing the system to comply with grid current total harmonic distortion (THD) and dc link voltage loop PM constraints, were established. This article demonstrates that an additional degree-of-freedom (DOF) present in type-II compensator (compared to PI) permits optimizing dc-link voltage response to load step in addition to the abovementioned constraints fulfillment. Design guidelines for deriving optimal type-II compensator coefficients set by means of combined time and frequency-domain analysis are provided. The revealed findings are accurately supported by simulations and experiments.
| Original language | English |
|---|---|
| Pages (from-to) | 6923-6931 |
| Number of pages | 9 |
| Journal | IEEE Journal of Emerging and Selected Topics in Power Electronics |
| Volume | 13 |
| Issue number | 6 |
| DOIs | |
| State | Published - 1 Jan 2025 |
Keywords
- Phase margin (PM)
- power factor correction rectifier (PFCR)
- proportional–integrative (PI) compensator
- total harmonic distortion (THD)
- type-II compensator
ASJC Scopus subject areas
- Energy Engineering and Power Technology
- Electrical and Electronic Engineering