Providing performance guarantees in multipass network processors

Isaac Keslassy, Kirill Kogany, Gabriel Scalosub, Michael Segal

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    7 Scopus citations

    Abstract

    Current network processors (NPs) increasingly deal with packets with heterogeneous processing times. As a consequence, packets that require many processing cycles can significantly delay low-latency traffic, because the common approach in today's NPs is to employ run-to-completion processing. These difficulties have led to the emergence of the Multipass NP architecture, where after a processing cycle ends, all processed packets are recycled into the buffer and re-compete for processing resources. In this work we provide a model that captures many of the characteristics of this architecture, and consider several scheduling and buffer management algorithms that are specially designed to optimize the performance of multipass network processors. In particular, we provide analytical guarantees for the throughput performance of our algorithms. We further conduct a comprehensive simulation study that validates our results.

    Original languageEnglish
    Title of host publication2011 Proceedings IEEE INFOCOM
    Pages3191-3199
    Number of pages9
    DOIs
    StatePublished - 2 Aug 2011
    EventIEEE INFOCOM 2011 - Shanghai, China
    Duration: 10 Apr 201115 Apr 2011

    Publication series

    NameProceedings - IEEE INFOCOM
    ISSN (Print)0743-166X

    Conference

    ConferenceIEEE INFOCOM 2011
    Country/TerritoryChina
    CityShanghai
    Period10/04/1115/04/11

    ASJC Scopus subject areas

    • General Computer Science
    • Electrical and Electronic Engineering

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