Providing performance guarantees in multipass network processors

Isaac Keslassy, Kirill Kogan, Gabriel Scalosub, Michael Segal

Research output: Contribution to journalArticlepeer-review

Abstract

Current network processors (NPs) increasingly deal with packets with heterogeneous processing times. In such an environment, packets that require many processing cycles delay low-latency traffic because the common approach in today's NPs is to employ run-to-completion processing. These difficulties have led to the emergence of the Multipass NP architecture, where after a processing cycle ends, all processed packets are recycled into the buffer and recompete for processing resources. In this paper, we provide a model that captures many of the characteristics of this architecture, and we consider several scheduling and buffer management algorithms that are specially designed to optimize the performance of multipass network processors. In particular, we provide analytical guarantees for the throughput performance of our algorithms. We further conduct a comprehensive simulation study, which validates our results.
Original languageEnglish
Pages (from-to)1895-1909
Number of pages15
JournalIEEE/ACM Trans. Netw.
Volume20
Issue number6
DOIs
StatePublished - 2012

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