TY - GEN

T1 - Recoverable mutual exclusion in sub-logarithmic time

AU - Golab, Wojciech

AU - Hendler, Danny

N1 - Funding Information:
∗Wojciech Golab is supported in part by the Natural Sciences and Engineering Research Council (NSERC) of Canada, Discovery Grants Program, and by a Google Faculty Research Award. †Danny Hendler is supported in part by the Israel Science Foundation (grant 1749/14).
Publisher Copyright:
© 2017 Association for Computing Machinery.

PY - 2017/7/26

Y1 - 2017/7/26

N2 - Recoverable mutual exclusion (RME) is a variation on the classic mutual exclusion (ME) problem that allows processes to crash and recover. The time complexity of RME algorithms is quantified in the same way as for ME, namely by counting remote memory references - expensive memory operations that traverse the processor-to-memory interconnect. Priorwork on the RME problem established an upper bound of O(log N) RMRs in an asynchronous shared memory model with N processes that communicate using atomic read and write operations, prompting the question whether sub-logarithmic RMR complexity is attainable using common read modify-write primitives. We answer this question positively in the cache-coherent model by presenting an RME algorithm that incurs O(log N/log log N) RMRs and uses read, write, Fetch-And-Store, and Compare-And-Swap instructions. We also present an O(1) RMRs algorithm that relies on double-word Compare-And-Swap and a double-word variation of Fetch-And-Store. Both algorithms are inspired by Mellor-Crummey and Scott's queue lock.

AB - Recoverable mutual exclusion (RME) is a variation on the classic mutual exclusion (ME) problem that allows processes to crash and recover. The time complexity of RME algorithms is quantified in the same way as for ME, namely by counting remote memory references - expensive memory operations that traverse the processor-to-memory interconnect. Priorwork on the RME problem established an upper bound of O(log N) RMRs in an asynchronous shared memory model with N processes that communicate using atomic read and write operations, prompting the question whether sub-logarithmic RMR complexity is attainable using common read modify-write primitives. We answer this question positively in the cache-coherent model by presenting an RME algorithm that incurs O(log N/log log N) RMRs and uses read, write, Fetch-And-Store, and Compare-And-Swap instructions. We also present an O(1) RMRs algorithm that relies on double-word Compare-And-Swap and a double-word variation of Fetch-And-Store. Both algorithms are inspired by Mellor-Crummey and Scott's queue lock.

KW - Concurrency

KW - Fault tolerance

KW - Multi-core algorithms

KW - Mutual exclusion

KW - Non-volatile main memory

KW - Persistent data structures

KW - Recovery

KW - Shared memory

UR - http://www.scopus.com/inward/record.url?scp=85027890435&partnerID=8YFLogxK

U2 - 10.1145/3087801.3087819

DO - 10.1145/3087801.3087819

M3 - Conference contribution

AN - SCOPUS:85027890435

T3 - Proceedings of the Annual ACM Symposium on Principles of Distributed Computing

SP - 211

EP - 220

BT - PODC 2017 - Proceedings of the ACM Symposium on Principles of Distributed Computing

PB - Association for Computing Machinery

T2 - 36th ACM Symposium on Principles of Distributed Computing, PODC 2017

Y2 - 25 July 2017 through 27 July 2017

ER -