Summation topologies for high power amplifier based on MMIC technology

Implementation of Power Amplifiers, based on MMIC technology, requires a method for summing the power from several active devices like F.E.T's and H.B.T's. This paper addresses the practical benefits and limitations of several in-phase summing topologies. The application for each power summing method is related to the device technology as well as to the performance goal. The decision strategy among the options yields a compromise among performance, size and circuit complexity. The methodology is a function of the technological parameters of the specific choosen device, the manufacturing process, as well as the assets and limitations of the summing topology. The approach discussed in the paper has been developed in order to provide evaluation quality criteria for the required performance.