Synthesizing hashing circuits

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

An approach for hardware synthesis of hashing transformations is presented, where the prescribed features that define a secure transformation are enforced by the design rules. This approach is fundamentally different from that adopted in implementations like SHA-1 or MD5, which are based on first devising an algorithm, and then analyzing it, with possible further modifications until arriving at a satisfactory performance that does not necessarily have solid theoretical foundations.

Original languageEnglish
Title of host publication2005 IEEE International 48th Midwest Symposium on Circuits and Systems, MWSCAS 2005
Pages67-70
Number of pages4
DOIs
StatePublished - 1 Dec 2005
Externally publishedYes
Event2005 IEEE International 48th Midwest Symposium on Circuits and Systems, MWSCAS 2005 - Cincinnati, OH, United States
Duration: 7 Aug 200510 Aug 2005

Publication series

NameMidwest Symposium on Circuits and Systems
Volume2005
ISSN (Print)1548-3746

Conference

Conference2005 IEEE International 48th Midwest Symposium on Circuits and Systems, MWSCAS 2005
Country/TerritoryUnited States
CityCincinnati, OH
Period7/08/0510/08/05

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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