TY - GEN
T1 - Synthesizing hashing circuits
AU - Arazi, Benjamin
PY - 2005/12/1
Y1 - 2005/12/1
N2 - An approach for hardware synthesis of hashing transformations is presented, where the prescribed features that define a secure transformation are enforced by the design rules. This approach is fundamentally different from that adopted in implementations like SHA-1 or MD5, which are based on first devising an algorithm, and then analyzing it, with possible further modifications until arriving at a satisfactory performance that does not necessarily have solid theoretical foundations.
AB - An approach for hardware synthesis of hashing transformations is presented, where the prescribed features that define a secure transformation are enforced by the design rules. This approach is fundamentally different from that adopted in implementations like SHA-1 or MD5, which are based on first devising an algorithm, and then analyzing it, with possible further modifications until arriving at a satisfactory performance that does not necessarily have solid theoretical foundations.
UR - http://www.scopus.com/inward/record.url?scp=33847147691&partnerID=8YFLogxK
U2 - 10.1109/MWSCAS.2005.1594041
DO - 10.1109/MWSCAS.2005.1594041
M3 - Conference contribution
AN - SCOPUS:33847147691
SN - 0780391977
SN - 9780780391970
T3 - Midwest Symposium on Circuits and Systems
SP - 67
EP - 70
BT - 2005 IEEE International 48th Midwest Symposium on Circuits and Systems, MWSCAS 2005
T2 - 2005 IEEE International 48th Midwest Symposium on Circuits and Systems, MWSCAS 2005
Y2 - 7 August 2005 through 10 August 2005
ER -