Task-Specific Low-Power Beamforming MIMO Receiver Using 2-Bit Analog-to-Digital Converters

MIMO communication systems deliver higher data capacity and wide-area coverage. However, they traditionally apply brute-force data acquisition with spatial signal processing using high-resolution ADCs and costly analog pre-processing circuits, leading to high power consumption and hardware complexity. This work presents the first integrated task-specific MIMO receiver (TSMRx) with beamforming using low-bit ADCs and achieving spatial blocker rejection implemented in 65nm CMOS technology, leveraging the recently proposed task-specific digital signal processing techniques [1]-[2]. We co-design analog pre-processing circuits and task-specific digital signal processing to achieve RF front-end power savings while maintaining an accurate task (signal of interest) recovery. The analog pre-processing front end utilizes highly-reconfigurable Noise-Cancelling Constant-Gm Vector Modulators (VMs) that perform current-domain processing with embedded beamforming while exploiting sparsity and variable (coarse or fine) VM resolution. The TSMRx system achieves successful task recovery using low-resolution (2-bit) ADCs with coarse-quantized (4-point) VMs and a 25%-sparse analog combiner while consuming only 75-115 mW from a 1.3 V supply for 0.5-3 GHz, the lowest reported among the works [3]-[6] in a similar technology node and frequency range.