Time domain design of digital compensators for PWM DC-DC converters

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

7 Scopus citations

Abstract

A time-domain design method for digital controller of PWM DC-DC converters that was developed, tested by simulations and verified experimentally. The proposed approach is based on the fact that the closed-loop response of a digitally controlled system is largely determined by the first few samples of the compensator. This concept is used to fit a digital PID template to the desired response. The proposed controller design method is carried out in the time domain and thus, bypasses errors related to continuous to discrete domain transformation and discretization. Digital PID controllers for a Buck and Boost type converters were implemented experimentally on a TMS320LF2407 DSP core. The measured closed-loop attributes were 3.5KHz bandwidth and phase margin of 40° for the Buck converter, and 1.6 KHz and 40° for the Boost. Good agreement was found between the design goals and the experimentally determined response.

Original languageEnglish
Title of host publicationAPEC 2007 - 22nd Annual IEEE Applied Power Electronics Conference and Exposition
Pages887-893
Number of pages7
DOIs
StatePublished - 1 Dec 2007
EventAPEC 2007 - 22nd Annual IEEE Applied Power Electronics Conference and Exposition - Anaheim, CA, United States
Duration: 25 Feb 20071 Mar 2007

Conference

ConferenceAPEC 2007 - 22nd Annual IEEE Applied Power Electronics Conference and Exposition
Country/TerritoryUnited States
CityAnaheim, CA
Period25/02/071/03/07

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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