Two order increase in the optical emission intensity of CMOS integrated circuit Si LED's (450nm - 750nm). Injection-avalanche based n+pn and p+np designs

Lukas W. Snyman, Monuko Du Plessis, Herzl Aharoni

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

We report on an increase in emission intensity of up to 10 nW /μ m 2 that has been realized with a new novel two junction, diagonal avalanche control and minority carrier injection silicon CMOS light emitting device. The device utilizes a four terminal configuration with two shallow n+p junctions, embedded in a p substrate. One junction is kept in deep avalanche and light emitting mode, while the other junction is forward biased and minority carrier electrons are injected into the avalanching junction. The device has been realized using standard 0.35 μm CMOS design rules and fabrication technology and operates at 9V in the current range 0.1 - 3mA. The optical emission intensity is anout two orders higher than that for previous single junction n+ p light emitting junctions. The optical output is about three orders higher than the low frequency detectivity limit of silicon p-i-n detectors of comparable dimensions. The realized characteristics may enable diverse opto-electronic applications in standard CMOS silicon technology based integrated circuitry.

Original languageEnglish
Title of host publicationSilicon Photonics II
DOIs
StatePublished - 25 May 2007
EventSilicon Photonics II - San Jose, CA, United States
Duration: 22 Jan 200724 Jan 2007

Publication series

NameProceedings of SPIE - The International Society for Optical Engineering
Volume6477
ISSN (Print)0277-786X

Conference

ConferenceSilicon Photonics II
Country/TerritoryUnited States
CitySan Jose, CA
Period22/01/0724/01/07

Keywords

  • CMOS integrated circuitry
  • Light emitting devices
  • Opto-electronics
  • Si LED
  • Silicon

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